The HTL8254 IP core is written in vendor neutral VHDL and as such can be simulated by any simulation tool. The testbench however uses Siemens’ Modelsim SignalSpy in order to provide a non-intrusive ...
As more complex calculation and check inside ISR are introduced from v1.2.0, there is possibly some crash depending on use-case. You can modify to use larger HW_TIMER_INTERVAL_US, (from current 33.3uS ...
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